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1 typical application features applications description 58v, 2a step-down module regulator the lt m ? 8050 is a 58v in , 2 a step down module ? (mi- cromodule) converter . included in the package are the switching controller, power switches, inductor and all support components. operating over an input voltage range of 3.6 v to 58 v, the LTM8050 supports an output voltage range of 0.8 v to 24 v and a switching frequency range of 100 khz to 2.4 mhz, each set by a single resistor. only the bulk input and output filter capacitors are needed to finish the design. the LTM8050 is packaged in a 9mm 15mm 4.92mm ball grid array ( bga) package suitable for automated assembly by standard surface mount equipment. the LTM8050 is available with snpb (bga) or rohs compli - ant terminal finish. l, lt , lt c , lt m , linear technology, the linear logo, module and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. n wide input voltage range: 3.6v to 58v (60v absolute maximum) n up to 2a output current n parallelable for increased output current n 0.8 v to 24v output voltage n adjustable switching frequency: 100khz to 2.4mhz n configurable as an inverter n current mode control n programmable soft-start n 9mm 15mm 4.92mm bga package n automotive batter y regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation efficiency vs output current, 12v out 12v out , 2a module regulator output current (a) 80 88 84 86 92 90 82 8050 ta01b efficiency (%) 0 0.5 1.0 1.5 2.0 v in = 24v v in = 36v v in = 48v v in run/ss share rt fb v out gnd 8050 ta01a LTM8050 v in * 17v to 58v *running voltage range. please refer to applications information section for start-up details v out 12v at 2a 57.6k f = 600khz 34.8k 4.7f 22f pgood sync aux bias click to view associated techclip videos. LTM8050 8050fb for more information www.linear.com/LTM8050
2 absolute maximum ratings v in , run / ss voltage ................................................. 60 v fb , rt , share voltage ............................................... 5 v v out , aux ................................................................. 25 v p good , sync , bias ................................................. 25 v v in + bias ................................................................. 72 v maximum junction temperature ( note 2) ............ 12 5 c solder temperature ............................................... 24 5 c storage temperature ............................................. 125 c (notes 1, 3) order information pin configuration gnd 1 a b c bank 1 bank 2 bank 3 d e f g h j k l 2 3 4 top view bga package 70-pin (15mm 9mm 4.92mm) 5 6 7 v out v in rt share pgood fb sync run/ss aux bias t jmax = 125c, v ja = 24.4c/w, v jc(bottom) = 11.5c/w, v jc(top) = 42.7c/w, v jb = 18.7c/w v values determined per jesd51-9, max output power weight = 1.8 grams part number pad or ball finish part marking* package type msl ra ting temperature range (see note 2) device finish code lt m 8050ey#pbf sac305 (rohs) lt m 8050y e1 bga 3 C40c to 125c lt m 8050iy#pbf sac305 (rohs) lt m 8050y e1 bga 3 C40c to 125c lt m 8050iy snpb (63/37) lt m 8050y e0 bga 3 C40c to 125c lt m 8050 mpy #pbf sac305 (rohs) lt m 8050y e1 bga 3 C55c to 125c lt m 8050 mpy snpb (63/37) lt m 8050y e0 bga 3 C55c to 125c consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part marking: www. linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www . linear.com/umodule/pcbassembly ? lga and bga package and t ray drawings: www. linear.com/packaging LTM8050 8050fb for more information www.linear.com/LTM8050
3 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTM8050e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the parameter conditions min typ max units minimum input voltage l 3.6 v output dc voltage 0 < i out 2a; r fb open 0 < i out 2a; r fb = 16.9k; v in = 32v 0.8 24 v v output dc current 0 2 a quiescent current into v in run/ss = 0v not switching bias = 0v, not switching 0.01 35 120 1 60 160 a a a quiescent current into bias run/ss = 0v not switching bias = 0v, not switching 0.01 82 1 0.5 120 5 a a a line regulation 5.5v < v in < 58v, i out = 1a 0.3 % load regulation 0a < i out < 2a 0.3 % output voltage ripple (rms) 0a < i out < 2a 10 mv switching frequency r t = 45.3k 750 khz voltage (at fb pin) l 775 770 790 805 810 mv mv internal feedback resistor 499 k minimum bias v oltage for proper operation 2.8 v run/ss pin current run/ss = 2.5v 6 10 a run input high voltage 2.5 v run input low voltage 0.2 v pgood threshold (at fb pin) v out rising 730 mv pgood leakage current pgood = 30v 0.1 1 a pgood sink current pgood = 0.4v 200 600 a sync input low threshold f sync = 550khz 0.5 v sync input high threshold f sync = 550khz 0.7 v sync bias current sync = 0v 0.1 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, run/ss = 12v, bias = 3v unless otherwise noted. (note 2) LTM8050i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the LTM8050mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: unless otherwise noted, the absolute minimum voltage is zero. LTM8050 8050fb for more information www.linear.com/LTM8050
4 operating conditions are per t able 1 and t a = 25c, unless otherwise noted. 76 78 92 84 88 94 80 86 90 82 efficiency (%) 0 0.5 1.0 1.5 2.0 8050 g04 12v in 24v in 36v in 48v in output current (a) typical performance characteristics efficiency vs output current, 2.5v out efficiency vs output current, 3.3v out efficiency vs output current, 5v out efficiency vs output current, 8v out efficiency vs output current, 12v out efficiency vs output current, 18v out efficiency vs output current, 24v out efficiency, v out 2v, 2a load, bias = 5v input current vs output current 2.5v out 60 80 70 75 90 85 65 efficiency (%) 0 0.5 1.0 1.5 2.0 8050 g01 5v in 12v in 24v in 36v in 48v in output current (a) 60 80 70 75 85 65 efficiency (%) 0 0.5 1.0 1.5 2.0 8050 g02 12v in 24v in 36v in 48v in output current (a) 65 80 70 75 90 85 efficiency (%) 0 0.5 1.0 1.5 2.0 8050 g03 output current (a) 12v in 24v in 36v in 48v in output current (a) 80 88 84 86 92 90 82 8050 g05 efficiency (%) 0 0.5 1.0 1.5 2.0 24v in 36v in 48v in output current (a) 82 88 84 86 94 92 90 8050 g06 efficiency (%) 0 0.5 1.0 1.5 36v in 48v in 85 87 93 97 99 89 95 91 efficiency (%) 0 0.5 1.0 1.5 8050 g07 output current (a) 36v in 48v in 45 75 55 65 80 60 70 50 efficiency (%) 1.00 1.25 1.50 1.75 2.00 8050 g08 v out (v) 5v in 12v in 24v in 36v in 48v in 0 1.2 0.4 0.8 1.4 0.6 1.0 0.2 input current (a) 0 0.5 1.0 1.5 2.0 8050 g09 output current (a) 5v in 12v in 24v in 36v in 48v in LTM8050 8050fb for more information www.linear.com/LTM8050
5 operating conditions are per t able 1 and t a = 25c, unless otherwise noted. typical performance characteristics input current vs output current 3.3v out input current vs output current 5v out input current vs output current 8v out input current vs output current 12v out input current vs output current 18v out input current vs output current 24v out input current vs v in output shorted output current vs v in output shorted bias current vs output current 2.5v out bias = 5v 0 0.6 0.2 0.4 0.8 0.7 0.3 0.5 0.1 input current (a) 0 0.5 1.0 1.5 2.0 8050 g10 output current (a) 12v in 24v in 36v in 48v in 0 0.6 0.2 0.4 1.2 1.0 0.8 input current (a) 0 0.5 1.0 1.5 2.0 8050 g11 output current (a) 12v in 24v in 36v in 48v in 0 0.6 0.8 1.0 1.2 1.4 0.2 0.4 1.6 input current (a) 0 0.5 1.0 1.5 2.0 8050 g12 output current (a) 12v in 24v in 36v in 48v in 0 0.6 0.2 0.4 1.2 1.0 0.8 input current (a) 0 0.5 1.0 1.5 2.0 8050 g13 output current (a) 24v in 36v in 48v in 0 0.6 0.2 0.4 1.2 1.0 0.8 input current (a) 0 0.5 1.0 1.5 8050 g14 output current (a) 36v in 48v in 0 0.6 0.8 1.0 1.2 0.2 0.4 1.4 input current (a) 0 0.5 1.0 1.5 8050 g15 output current (a) 36v in 48v in input voltage (v) 0 input current (ma) 400 300 200 100 0 8050 g16 20 40 60 80 rt = 215k (200khz) rt = 93.1k (400khz) rt = 57.6k (600khz) rt = 33.2k (900khz) input voltage (v) 0 output current (a) 5 4 3 2 1 0 8050 g16 20 40 60 80 rt = 215k (200khz) rt = 93.1k (400khz) rt = 57.6k (600khz) rt = 33.2k (900khz) 0 4 16 12 8 bias current (ma) 0 0.5 1.0 1.5 2.0 8050 g18 output current (a) 12v in 24v in 36v in 48v in LTM8050 8050fb for more information www.linear.com/LTM8050
6 0 40 30 20 10 bias current (ma) 0 0.5 1.0 1.5 2.0 8050 g22 output current (a) 24v in 36v in 48v in 0 20 15 10 5 bias current (ma) 0 0.5 1.0 1.5 2.0 8050 g19 output current (a) 12v in 24v in 36v in 48v in 0 30 20 10 bias current (ma) 0 0.5 1.0 1.5 2.0 8050 g20 output current (a) 12v in 24v in 36v in 48v in 0 50 40 30 20 10 bias current (ma) 0 0.5 1.0 1.5 2.0 8050 g21 output current (a) 12v in 24v in 36v in 48v in 0 40 35 30 25 20 15 10 5 minimum v in (v) 0 5 10 25 2015 8050 g25 v out (v) 3.00 4.00 3.75 3.50 3.25 minimum v in (v) 0 0.5 1.0 1.5 2.0 8050 g26 output current (a) 0 0.5 1.0 1.5 2.0 8050 g27 output current (a) 3.5 4.2 4.1 4.0 3.9 3.8 3.7 3.6 minimum v in (v) 0 50 40 30 20 10 bias current (ma) 0 0.5 1.0 1.5 8050 g23 output current (a) 36v in 48v in 0 80 70 60 50 40 30 20 10 bias current (ma) 0 0.5 1.0 1.5 8050 g24 output current (a) 36v in 48v in operating conditions are per t able 1 and t a = 25c, unless otherwise noted. typical performance characteristics bias current vs output current 3.3v out bias = 5v bias current vs output current 5v out bias = 5v bias current vs output current 8v out bias = 5v bias current vs output current 12v out bias = 5v bias current vs output current 18v out bias = 5v bias current vs output current 24v out bias = 5v minimum v in vs v out maximum load, bias = 5v minimum v in vs output current 1.8v out and below, bias = 5v minimum v in vs output current 2.5v out , bias = 5v LTM8050 8050fb for more information www.linear.com/LTM8050
7 operating conditions are per t able 1 and t a = 25c, unless otherwise noted. typical performance characteristics minimum v in vs output current 3.3v out , bias = v out minimum v in vs output current 5v out , bias = v out minimum v in vs output current 8v out , bias = v out minimum v in vs output current 12v out , bias = v out minimum v in vs output current 18v out , bias = v out minimum v in vs output current 24v out , bias = 5v minimum v in vs output current C3.3v out , bias = gnd minimum v in vs output current C5v out , bias = gnd minimum v in vs output current C8v out , bias = gnd 3.0 6.0 4.5 4.0 5.5 5.0 3.5 minimum v in (v) 0 0.5 1.0 1.5 2.0 8050 g28 output current (a) running to start, run control to start, run = v in 7.05 7.55 7.10 7.15 7.20 7.25 7.30 7.35 7.40 7.45 7.50 minimum v in (v) 0 0.5 1.0 1.5 2.0 8050 g29 output current (a) running to start, run control to start, run = v in 7.5 12.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 minimum v in (v) 0 0.5 1.0 1.5 2.0 8050 g30 output current (a) running to start, run control to start, run = v in 11 17 14 13 16 15 12 minimum v in (v) 0 0.5 1.0 1.5 2.0 8050 g31 output current (a) running to start, run control to start, run = v in 0 0.5 1.0 1.5 8050 g32 output current (a) 19 26 25 24 23 22 21 20 minimum v in (v) 25 35 26 27 28 29 30 31 32 33 34 minimum v in (v) 0 0.5 1.0 1.5 8050 g33 output current (a) 8050 g34 0 30 15 10 25 20 5 minimum v in (v) 0 0.5 1.0 1.5 2.0 output current (a) running to start, run control to start, run = v in 8050 g35 0 25 15 10 20 5 minimum v in (v) 0 0.5 1.0 1.5 2.0 output current (a) running to start, run control to start, run = v in 8050 g36 0 25 15 10 20 5 minimum v in (v) 0 0.5 1.0 1.5 2.0 output current (a) running to start, run control to start, run = v in LTM8050 8050fb for more information www.linear.com/LTM8050
8 operating conditions are per t able 1 and t a = 25c, unless otherwise noted. 0 10 30 20 temperature rise (c) 0 0.5 1.0 1.5 2.0 8050 g40 5v in 12v in 24v in 36v in 48v in output current (a) typical performance characteristics minimum v in vs output current C12v out , bias = gnd minimum v in vs output current C18v out , bias = gnd minimum v in vs output current C24v out , bias = gnd internal temperature rise vs output current, 2.5v out internal temperature rise vs output current, 3.3v out internal temperature rise vs output current, 5v out 8050 g37 0 25 15 10 20 5 minimum v in (v) 0 0.5 1.0 1.5 output current (a) running to start, run control to start, run = v in 8050 g38 0 25 15 10 20 5 minimum v in (v) 0 0.25 0.50 0.75 output current (a) running to start, run control to start, run = v in 8050 g39 0 25 15 10 20 5 minimum v in (v) 0 0.3 0.5 0.4 0.1 0.2 output current (a) running to start, run control to start, run = v in 0 10 30 20 temperature rise (c) 0 0.5 1.0 1.5 2.0 8050 g41 output current (a) 12v in 24v in 36v in 48v in 0 10 30 20 temperature rise (c) 0 0.5 1.0 1.5 2.0 8050 g42 output current (a) 12v in 24v in 36v in 48v in LTM8050 8050fb for more information www.linear.com/LTM8050
9 operating conditions are per t able 1 and t a = 25c, unless otherwise noted. typical performance characteristics internal temperature rise vs output current, 24v out soft-start waveform for various c ss values 1a resistive load, dc1723a demo board output ripple at 2a load, standard dc1723a demo board 0 10 50 40 30 20 temperature rise (c) 0 0.5 1.0 1.5 8050 g46 output current (a) 36v in 48v in 58v in internal temperature rise vs output current, 8v out internal temperature rise vs output current, 12v out internal temperature rise vs output current, 18v out 0 10 40 30 20 temperature rise (c) 0 0.5 1.0 1.5 2.0 8050 g43 output current (a) 12v in 24v in 36v in 48v in 0 10 40 30 20 temperature rise (c) 0 0.5 1.0 1.5 2.0 8050 g44 output current (a) 24v in 36v in 48v in 0 10 40 30 20 temperature rise (c) 0 0.5 1.0 1.5 8050 g45 output current (a) 24v in 36v in 48v in 1v/div 8050 g47 200s/div c ss = 0f c ss = 0.1f c ss = 0.47f r ss = 100k 10mv/div 8050 g48 1s/div free running (400khz) 600khz sync 800khz sync refer to dc1723a demo manual for proper ripple measurement technique LTM8050 8050fb for more information www.linear.com/LTM8050
10 pin functions v out (bank 1): power output pins. apply the output filter capacitor and the output load between these pins and gnd pins. gnd ( bank 2): tie these gnd pins to a local ground plane below the LTM8050 and the circuit components. in most applications, the bulk of the heat flow out of the LTM8050 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. return the feedback divider ( r fb ) to this net. v in ( bank 3): the v in pin supplies current to the LTM8050 s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor; see table 1 for recommended values. aux ( pin g5): low current voltage source for bias. in many designs, the bias pin is simply connected to v out . the aux pin is internally connected to v out and is placed adjacent to the bias pin to ease printed circuit board rout- ing. although this pin is internally connected to v out , it is not intended to deliver a high current, so do not draw current from this pin to the load. if this pin is not tied to bias, leave it floating. bias ( pin h 5): the bias pin connects to the internal power bus. connect to a power source greater than 2.8 v and less than 25 v. if the output is greater than 2.8 v, connect this pin there. if the output voltage is less, connect this to a voltage source between 2.8 v and 25 v. also, make sure that bias + v in is less than 72v. run/ss ( pin l5): pull the run/ss pin below 0.2 v to shut down the LTM8050. tie to 2.5 v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section. sync ( pin l6): this is the external clock synchronization input. ground this pin for low ripple burst mode operation at low output loads. tie to a stable voltage source greater than 0.7 v to disable burst mode operation. do not leave this pin floating. tie to a clock source for synchroniza - tion. clock edges should have rise and fall times faster than 1 s. see the synchronization section in applications information . rt ( pin g7): the rt pin is used to program the switching frequency of the LTM8050 by connecting a resistor from this pin to ground. table 2 gives the resistor values that correspond to the resultant switching frequency. minimize the capacitance at this pin. share ( pin h7): tie this to the share pin of another LTM8050 when paralleling the outputs. otherwise, do not connect. pgood ( pin j7): the pgood pin is the open-collector output of an internal comparator. pgood remains low until the fb pin is within 10% of the final regulation voltage. pgood output is valid when v in is above 3.6v and run/ ss is high. if this function is not used, leave this pin floating. fb ( pin k7): the LTM8050 regulates its fb pin to 0.79v. connect the adjust resistor from this pin to ground. the value of r fb is given by the equation r fb = 394.21/(v out C 0.79), where r fb is in k?. package row and column labeling m ay vary among module products. review each package layout carefully. LTM8050 8050fb for more information www.linear.com/LTM8050
11 block diagram operation the LTM8050 is a standalone nonisolated step-down switching dc/dc power supply that can deliver up to 2 a of output current. this module provides a precisely regulated output voltage programmable via one external resistor from 0.8 v to 24 v. the input voltage range is 3.6 v to 58v. given that the LTM8050 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. as shown in the block diagram, the LTM8050 contains a current mode controller, power switching element, power inductor, power schottky diode and a modest amount of input and output capacitance. the LTM8050 is a fixed frequency pwm regulator. the switching frequency is set by simply connecting the appropriate resistor value from the rt pin to gnd. an internal regulator provides power to the control circuitry . the bias regulator normally draws power from the v in pin, but if the bias pin is connected to an external volt- age higher than 2.8 v, bias power will be drawn from the external source ( typically the regulated output voltage). this improves efficiency. the run/ss pin is used to place the LTM8050 in shutdown, disconnecting the output and reducing the input current to less than 1a. to further optimize efficiency, the LTM8050 automatically switches to burst mode ? operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50a in a typical application. the oscillator reduces the LTM8050 s operating frequency when the voltage at the fb pin is low. this frequency fold - back helps to control the output current during start-up and overload. the LTM8050 contains a power good comparator which trips when the fb pin is at roughly 90% of its regulated value. the pgood output is an open- collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pgood pin high. power good is valid when the LTM8050 is enabled and v in is above 3.6 v. the LTM8050 is equipped with a thermal shutdown that will inhibit power switching at high junction tempera- tures. the activation threshold of this function, however, is above 125 c to avoid interfering with normal operation. thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. 8050 bd v in 8.2h 4.4f 0.2f current mode controller run/ss share sync aux bias gnd rt fb pgood v out 15pf 499k 1% LTM8050 8050fb for more information www.linear.com/LTM8050
12 applications information for most applications, the design process is straight forward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2. apply the recommended c in , c out , r fb and r t values. 3. connect bias as indicated. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction tempera- ture, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency ( and attendant r t value) at which the LTM8050 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency ( and r t value) for optimal efficiency over the given input condition is given in the f optimal column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper- ating conditions . applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap - plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir - cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the LTM8050s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the LTM8050 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high perfor- mance electrolytic capacitor at the output. it may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8050. a ceramic input capacitor combined with trace or cable inductance forms a high q ( under damped) tank circuit. if the LTM8050 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi - bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. frequency selection the LTM8050 uses a constant frequency pwm architec- ture that can be programmed to switch from 100 khz to 2.4mhz by using a resistor tied from the rt pin to ground. table 2 provides a list of r t resistor values and their re- sultant frequencies. LTM8050 8050fb for more information www.linear.com/LTM8050
13 applications information table 1: recommended component values and configuration (t a = 25c) v in range v out v bias c in c out r fb f optimal r t(optimal) f max r t(min) 3.6v to 58v 0.8v 2.8v to 25v 3 4.7f, 2220, 100v 3 220f, 1206, 4v open 110khz 392k 125khz 340k 3.6v to 58v 1v 2.8v to 25v 3 4.7f, 2220, 100v 3 220f, 1206, 4v 1.87m 110khz 392k 125khz 340k 3.6v to 58v 1.2v 2.8v to 25v 2 4.7f, 2220, 100v 3 220f, 1206, 4v 953k 125khz 340k 150khz 280k 3.6v to 58v 1.5v 2.8v to 25v 2 4.7f, 2220, 100v 2 220f, 1206, 4v 549k 150khz 280k 180khz 232k 3.6v to 58v 1.8v 2.8v to 25v 2 4.7f, 2220, 100v 2 220f, 1206, 4v 383k 180khz 232k 215khz 191k 4.1v to 58v 2.5v 2.8v to 25v 4.7f, 2220, 100v 220f, 1206, 4v 226k 230khz 174k 270khz 150k 5.3v to 58v 3.3v aux 4.7f, 2220, 100v 220f, 1206, 4v 154k 280khz 140k 330khz 118k 7.5v to 58v 5v aux 4.7f, 2220, 100v 100f, 1210, 6.3v 93.1k 400khz 93.1k 460khz 80.6k 10.5v to 58v 8v aux 4.7f, 2220, 100v 47f, 1210, 10v 54.9k 550khz 64.9k 690khz 49.9k 17v to 58v 12v aux 4.7f, 2220, 100v 22f, 1210, 16v 34.8k 600khz 57.6k 750khz 44.2k 24v to 58v 18v 2.8v to 25v 4.7f, 2220, 100v 22f, 1812, 25v 22.6k 760khz 42.2k 850khz 37.4k 34v to 58v 24 v 2.8v to 25v 4.7f, 2220, 100v 22f, 1812, 25v 16.5k 900khz 33.2k 960khz 30.1k 9v to 24v 0.8v v in 4.7f, 1206, 25v 2 220f, 1206, 4v open 150khz 280k 300khz 130k 9v to 24v 1v v in 4.7f, 1206, 25v 2 220f, 1206, 4v 1.87m 180khz 232k 345khz 113k 9v to 24v 1.2v v in 4.7f, 1206, 25v 2 220f, 1206, 4v 953k 230khz 174k 400khz 93.1k 9v to 24v 1.5v v in 4.7f, 1206, 25v 220f, 1206, 4v 549k 280khz 140k 460khz 80.6k 9v to 24v 1.8v v in 4.7f, 1206, 25v 220f, 1206, 4v 383k 330khz 118k 500khz 73.2k 9v to 24v 2.5v v in 4.7f, 1206, 25v 100f, 1210, 6.3v 226k 345khz 113k 600khz 57.6k 9v to 24v 3.3v aux 4.7f, 1206, 25v 100f, 1210, 6.3v 154k 425khz 88.7k 650khz 52.3k 9v to 24v 5v aux 4.7f, 1206, 25v 47f, 1210, 10v 93.1k 500khz 73.2k 700khz 48.7k 10.5v to 24v 8v aux 4.7f, 1206, 25v 47f, 1210, 10v 54.9k 600khz 57.6k 750khz 44.2k 17v to 24v 12v aux 2.2f, 1206, 50v 22f, 1210, 16v 34.8k 760khz 42.2k 850khz 36.5k 18v to 36v 0.8v 2.8v to 25v 1f, 1206, 50v 3 220f, 1206, 4v open 100khz 432k 200khz 205k 18v to 36v 1v 2.8v to 25v 1f, 1206, 50v 3 220f, 1206, 4v 1.87m 120khz 357k 250khz 162k 18v to 36v 1.2v 2.8v to 25v 1f, 1206, 50v 2 220f, 1206, 4v 953k 140 khz 301k 270khz 150k 18v to 36v 1.5v 2.8v to 25v 1f, 1206, 50v 2 220f, 1206, 4v 549k 180khz 232k 300khz 130k 18v to 36v 1.8v 2.8v to 25v 1f, 1206, 50v 220f, 1206, 4v 383k 220khz 187k 350khz 110k 18v to 36v 2.5v 2.8v to 25v 1f, 1206, 50v 100f, 1210, 6.3v 226k 300khz 130k 425khz 88.7k 18v to 36v 3.3v aux 1f, 1206, 50v 100f, 1210, 6.3v 154k 345khz 113k 550khz 64.9k 18v to 36v 5v aux 1f, 1206, 50v 47f, 1210, 10v 93.1k 425khz 88.7k 800khz 38.3k 18v to 36v 8v aux 2.2f, 1206, 50v 22f, 1210, 16v 54.9k 550khz 64.9k 1.03mhz 25.5k 18v to 36v 12v aux 2.2f, 1206, 50v 22f, 1210, 16v 34.8k 760khz 42.2k 1.03mhz 25.5k 24v to 36v 18v 2.8v to 25v 2.2f, 1206, 50v 22f, 1812, 25v 22.6k 800khz 38.3k 1.03mhz 25.5k 18v to 58v 0.8v 2.8v to 25v 1f, 1206, 100v 3 220f, 1206, 4v open 100khz 432k 125khz 340k 18v to 58v 1v 2.8v to 25v 1f, 1206, 100v 3 220f, 1206, 4v 1.87m 100khz 432k 125khz 340k 18v to 58v 1.2v 2.8v to 25v 1f, 1206, 100v 3 220f, 1206, 4v 953k 100khz 432k 150khz 280k 18v to 58v 1.5v 2.8v to 25v 1f, 1206, 100v 2 220f, 1206, 4v 549k 110khz 392k 180khz 232k 18v to 58v 1.8v 2.8v to 25v 1f, 1206, 100 v 2 220f, 1206, 4v 383k 125khz 340k 215khz 191k 18v to 58v 2.5v 2.8v to 25v 1f, 1206, 100v 220f, 1206, 4v 226k 180khz 232k 270khz 150k 18v to 58v 3.3v aux 1f, 1206, 100v 100f, 1210, 6.3v 154k 280khz 140k 330khz 118k 18v to 58v 5v aux 1f, 1206, 100v 100f, 1210, 6.3v 93.1k 400khz 93.1k 460khz 80.6k 18v to 58v 8v aux 2.2f, 1206, 100v 47f, 1210, 10v 54.9k 550khz 64.9k 690khz 49.9k 18v to 58v 12v aux 2.2f, 1206, 100v 22f, 1210, 16v 34.8k 600khz 57.6k 960khz 30.1k 2.5v to 54.7v C3.3v aux 2 4.7f, 2220, 100v 100f, 1210, 6.3v 154k 300khz 130k 330khz 118k 3.3v to 53v C5v aux 4.7f, 2220, 100v 100f, 1210, 6.3v 93.1k 400khz 93.1k 460khz 80.6k 3.3v to 50v C8v aux 4.7f, 2220, 100v 47f, 1210, 10v 54.9k 550khz 64.9k 690khz 49.9k 4.5v to 46v C12v aux 4.7f, 2220, 100v 47f, 1210, 16v 34.8k 600khz 57.6k 750khz 44.2k 6v to 40v C18v 2.8v to 25v 4.7f, 2220, 100v 22f, 1812, 25v 22.6k 760khz 42.2k 850khz 37.4k 10v to 34v C24v 2.8v to 25v 4.7f, 2220, 100v 22f, 1812, 25v 16.5k 900khz 33.2k 960khz 30.1k note: do not allow v in + bias to exceed 72v. LTM8050 8050fb for more information www.linear.com/LTM8050
14 applications information table 2. switching frequency vs r t value switching frequency (mhz) r t value (k) 0.1 432 0.2 215 0.3 137 0.4 93.1 0.5 73.2 0.6 57.6 0.7 51.1 0.8 38.3 0.9 33.2 1 32.4 1.2 24.9 1.4 20 1.6 16.2 1.8 14 2 11 2.2 8.06 2.4 7.15 operating frequency trade-offs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the LTM8050 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8050 if the output is overloaded or short circuited. a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. bias pin considerations the bias pin is used to provide drive power for the internal power switching stage and operate other internal circuitry . for proper operation, it must be powered by at least 2.8v . if the output voltage is programmed to 2.8 v or higher, bias may be simply tied to aux. if v out is less than 2.8 v , bias can be tied to v in or some other voltage source. if the bias pin voltage is too high, the efficiency of the LTM8050 may suffer. the optimum bias voltage is dependent upon many factors, such as load current, input voltage, output voltage and switching frequency, but 4 v to 5 v works well in many applications. in all cases, ensure that the maximum voltage at the bias pin is less than 25 v and that the sum of v in and bias is less than 72v . if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. load sharing tw o or more LTM8050s may be paralleled to produce higher currents. to do this, tie the v in , fb, v out and share pins of all the paralleled LTM8050s together. to ensure that paralleled modules start up together, the run/ss pins may be tied together, as well. if the run/ss pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. current sharing can be improved by synchronizing the LTM8050s. an example of two ltm 8050s configured for load sharing is given in the typical applications section. when n number of units are connected for parallel operation and a single feedback resistor is used for all of them, the equation for the feedback resistor is: r fb = 394.21 n v out ? 0.79 ( ) k ? burst mode operation to enhance efficiency at light loads, the LTM8050 auto- matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the LTM8050 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. in addition, v in and bias quiescent currents are each reduced to microamps during the sleep time. as the load current decreases towards a no load condition, the percentage of time that the LTM8050 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency. burst mode operation is enabled by tying sync to gnd. to disable burst mode operation, tie sync to a stable voltage above 0.7v. do not leave the sync pin floating. LTM8050 8050fb for more information www.linear.com/LTM8050
15 applications information figure 1. apply an rc network to run/ss to control the soft-start behavior of the LTM8050 at power-up minimum input voltage the LTM8050 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. in addition, the input voltage required to turn on is higher than that required to run, and depends upon whether the run/ss is used. as shown in the typical performance characteristics section, the minimum input voltage to run a 3.3 v output at light load is only about 3.6v, but, if run/ss is pulled up to v in , it takes 5.5v in to start. if the LTM8050 is enabled with the run/ss pin after v in is applied, the minimum voltage to start at light loads is lower, about 4.3 v. similar curves detailing this behavior of the LTM8050 for other outputs are also included in the typical performance characteristics section. soft-start the run/ss pin can be used to soft-start the LTM8050, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc network to create a voltage ramp at this pin . ( see figure 1). by choos- ing an appropriate rc time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply at least 20 a when the run/ss pin reaches 2.5 v. output voltage soft-start waveforms for various values of r ss and c ss are given in the typical performance characteristics section. run/ss run run 100k c ss this in turn limits the amount of energy that can be delivered to the load under fault. during the start-up time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. synchronization the internal oscillator of the LTM8050 can be synchronized by applying an external 250 khz to 2 mhz clock to the sync pin. do not leave this pin floating. when synchronizing the LTM8050, select an r t resistor value that corresponds to an operating frequency 20% lower than the intended synchronization frequency ( see the frequency selection section). in addition to synchronization, the sync pin controls burst mode behavior. if the sync pin is driven by an external clock, or pulled up above 0.7 v, the LTM8050 will not enter burst mode operation, but will instead skip pulses to maintain regulation instead. shorted input protection care needs to be taken in systems where the output will be held high when the input to the LTM8050 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the LTM8050s output. if the v in pin is allowed to float and the shdn pin is held high (either by a logic signal or because it is tied to v in ), then the LTM8050s internal circuitry will pull its quiescent current through its internal power switch. this is fine if your system can tolerate a few milliamps in this state. if you ground the run/ss pin, the input current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the LTM8050 can pull large currents from the output through the v in pin. figure 2 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the LTM8050. the LTM8050 is neverthe - less a switching power supply, and care must be taken to frequency foldback the LTM8050 is equipped with frequency foldback which acts to reduce the thermal and energy stress on the internal power elements during a short circuit or output overload condition. if the LTM8050 detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. LTM8050 8050fb for more information www.linear.com/LTM8050
16 applications information figure 2. the input diode prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the LTM8050 runs only when the input is present minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 3 for a suggested layout. ensure that the grounding and heat sinking are acceptable. 1. place the r fb and r t resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the LTM8050. 3. place the c out capacitor as close as possible to the v out and gnd connection of the LTM8050. 4. place the c in and c out capacitors such that their ground current flow directly adjacent to or underneath the LTM8050. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the LTM8050. 6. for good heat sinking, use vias to connect the gnd cop - per area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 3. the LTM8050 can benefit from the heat-sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8050. however, these capacitors can cause problems if the LTM8050 is plugged into a live supply ( see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt - age at the v in pin of the LTM8050 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8050s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the LTM8050 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. v in run/ss rt fb v out gnd 8050 f02 LTM8050 v in v out aux bias sync bias aux v out v in gnd gnd 8050 f03 gnd thermal vias to gnd r t r fb pgood c in c out sync run/ss figure 3. layout showing suggested external components, gnd plane and thermal vias LTM8050 8050fb for more information www.linear.com/LTM8050
17 figure 4. in negative output voltage applications, prevent adverse effects from fast rising v in by adding clamp and rectifying diodes applications information negative output considerations the LTM8050 may be configured to generate a negative output voltage. examples of this are shown in the typical applications section. for very fast rising input voltages, care must be taken to ensure that start-up does not cre - ate excessive surge currents that may create unwanted voltages or even damage the LTM8050. consider the circuit in figure 4. if a step input is applied between v in and system gnd, the c in and c out capaci- tors form an ac divider network that tends to create a positive voltage on system v out . in order to protect the load from seeing an excessive inverted voltage, an anti- parallel schottky diode may be used to clamp the voltage. furthermore, current flowing out of the bias pin can have adverse affects. to prevent this from happening, apply a series resistor (about 200) and schottky diode between bias and its voltage source. thermal considerations the LTM8050 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance character - istics section can be used as a guide. these curves were generated by a LTM8050 mounted to a 40cm 2 4- layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system s line, load and environmental operating conditions. the thermal resistance numbers listed in page 2 of the data sheet are based on modeling the module package mounted on a test board specified per jesd 51-9 ( test boards for area array surface mount package thermal measurements). the thermal coefficients provided in this page are based on jesd 51-12 ( guidelines for reporting and using electronic package thermal information). for increased accuracy and fidelity to the actual application, many designers use fea to predict thermal performance. to that end, page 2 of the data sheet typically gives four thermal coefficients: ja C thermal resistance from junction to ambient jcbottom C thermal resistance from junction to the bottom of the product case jctop C thermal resistance from junction to top of the product case jb C thermal resistance from junction to the printed circuit board while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confusion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased below: ja is the natural convection junction- to- ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as v in run/ss share rt adj v out gnd 8050 f04 LTM8050 v in v out (negative voltage) add an anti-parallel diode to clamp positive voltage spike add a series resistor and diode to prevent current from flowing out of bias inrush current can cause a positive transient on v out c in c out pgood sync aux bias LTM8050 8050fb for more information www.linear.com/LTM8050
18 applications information still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. jcbottom is the thermal resistance between the junction and bottom of the package with all of the component power dissipation flowing through the bottom of the package. in the typical module converter, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. jctop is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module converter are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junc - tion to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module converter and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module converter. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in the products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. a graphical representation of these thermal resistances follows: the blue resistances are contained within the module converter, and the green are outside. the die temperature of the LTM8050 must be lower than the maximum rating of 125 c, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8050. the bulk of the heat flow out of the LTM8050 is through the bottom of the module converter and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. 8050 f04 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction a t case (bottom)-to-board resistance LTM8050 8050fb for more information www.linear.com/LTM8050
19 typical applications 1.8v step-down converter v in run/ss share rt fb v out gnd 8050 ta02 LTM8050 v in 3.6v to 58v v out 1.8v at 2a 232k f = 180khz 383k 10f 440f pgood sync aux bias 33v 2.5v step-down converter v in run/ss share rt fb v out gnd 8050 ta03 LTM8050 v in * 4.1v to 58v v out 2.5v at 2a 174k f = 230khz 226k 4.7f pgood sync aux bias 3.3v *running voltage range. please refer to applications information section for start-up details 220f 8v step-down converter v in run/ss share rt fb v out gnd 8050 ta04 LTM8050 v in * 11v to 58v v out 8v at 2a 64.9k f = 550khz 54.9k 4.7f 47f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details C5v negative output converter v in run/ss share rt fb v out gnd 8050 ta05 LTM8050 v in v out ?5v 93.1k f = 400khz 93.1k 4.7f 47f pgood sync aux bias minimum v in vs output current C5v out , bias = gnd 8050 ta05b 0 25 15 10 20 5 minimum v in (v) 0 0.5 1.0 1.5 2.0 output current (a) running to start, run control to start, run = v in LTM8050 8050fb for more information www.linear.com/LTM8050
20 typical applications tw o LTM8050s in parallel, 2.5v at 3.8a v in run/ss share rt fb v out gnd LTM8050 v in * 4.1v to 58v v out 2.5v at 3.8a 3v 174k 230khz 113k pgood sync aux bias v in run/ss share rt fb v out gnd 8050 ta06 LTM8050 optional sync 174k 230khz 10f 10f 300f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details note: synchronize the two modules to avoid beat frequencies, if necessary. otherwise, tie each sync to gnd 3.3v step-down converter v in run/ss share rt fb v out gnd 8050 ta07 LTM8050 v in * 5.3v to 58v v out 3.3v at 2a 140k f = 280khz 154k 4.7f 220f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details LTM8050 8050fb for more information www.linear.com/LTM8050
21 pin assignment table (arranged by pin number) pin name pin name pin name pin name pin name pin name a1 v out b1 v out c1 v out d1 v out e1 gnd f1 gnd a2 v out b2 v out c2 v out d2 v out e2 gnd f2 gnd a3 v out b3 v out c3 v out d3 v out e3 gnd f3 gnd a4 v out b4 v out c4 v out d4 v out e4 gnd f4 gnd a5 gnd b5 gnd c5 gnd d5 gnd e5 gnd f5 gnd a6 gnd b6 gnd c6 gnd d6 gnd e6 gnd f6 gnd a7 gnd b7 gnd c7 gnd d7 gnd e7 gnd f7 gnd pin name pin name pin name pin name pin name g1 gnd h 1 - j1 v in k1 v in l1 v in g2 gnd h 2 - j2 v in k2 v in l2 v in g3 gnd h 3 - j3 v in k3 v in l3 v in g4 gnd h 4 - j 4 - k 4 - l 4 - g5 aux h5 bias j5 gnd k5 gnd l5 run/ss g6 gnd h6 gnd j6 gnd k6 gnd l6 sync g7 rt h7 share j7 pgood k7 fb l7 gnd package description package row and column labeling m ay vary among module products. review each package layout carefully. LTM8050 8050fb for more information www.linear.com/LTM8050
22 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. bga package 70-lead (15mm 9mm 4.92mm) (reference ltc dwg# 05-08-1918 rev a) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 6. solder ball composition is 96.5% sn/3.0% ag/0.5% cu 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail a ?b (70 places) detail b substrate a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 4.72 0.50 4.22 0.60 0.60 0.27 3.95 nom 4.92 0.60 4.32 0.75 0.63 15.00 9.00 1.27 12.70 7.62 0.32 4.00 max 5.12 0.70 4.42 0.90 0.66 0.37 4.05 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 70 a2 // bbb z z h2 h1 bga 70 1212 rev a suggested pcb layout top view 0.000 2.540 3.810 5.080 6.350 1.270 3.810 2.540 1.270 5.080 6.350 3.810 2.540 1.270 3.810 2.540 1.270 0.3175 0.3175 0.000 0.630 0.025 ? 70x package top view 4 pin ?a1? corner y x aaa z aaa z d e detail a package bottom view 3 see notes a b c d e f g h j k l pin 1 e b f g 7 6 5 4 3 2 1 tray pin 1 bevel package in tray loading orientation component pin ?a1? ltmxxxxxx module 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. LTM8050 8050fb for more information www.linear.com/LTM8050
23 revision history rev date description page number a 02/14 add snpb bga package option 1, 2 b 05/14 add techclip video icons correct typical performance characteristics labels 1 8 LTM8050 8050fb for more information www.linear.com/LTM8050
24 ? linear technology corporation 2013 lt 0514 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTM8050 package photo related parts part number description comments ltm4601/ltm4603 12a and 6a dc/dc module pin compatible; remote sensing; pll, tracking and margining, 4.5v v in 28v ltm4604a 4a, low v in dc/dc module 2.375v v in 5.5v, 0.8v v out 5v, 9mm 15mm 2.3mm lga package ltm4606 low emi 6a, 28v dc/dc module 4.5v v in 28v, 0.6v v out 5v, 15mm 15mm 2.8mm lga package ltm8020 200ma, 36v dc/dc module 4v v in 36v, 1.25v v out 5v, 6.25mm 6.25mm 2.32mm lga package ltm8022/ltm8023 1a and 2a, 36v dc/dc module pin compatible 3.6v v in 36v, 0.8v v out 10v, 11.25mm 9mm 2.82mm lga package ltm8027 60v, 4a dc/dc module 4.5v v in 60v; 2.5v v out 24v, 15mm 15mm 4.32mm lga package design resources subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products sear ch 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power sear ch parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management linear technologys family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. LTM8050 8050fb for more information www.linear.com/LTM8050

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